CMOS: Circuit Design, Layout, and Simulation

source : http://cmosedu.com/cmos1/book.htm

CMOS: Circuit Design, Layout, and Simulation, Revised Second Edition

General book information

Published by Wiley-IEEE, ISBN 978-0-470-22941-5, Revised 2^nd Edition, 2008.

The book’s author is R. Jacob Baker. Buy at Amazon.com.

The CMOSedu Google Group is found here.

Browse the book’s table of contents or index.

Errata and (some) email correspondence are found here.

Layout software and MOSIS information

The Electric VLSI Design System – free and powerful CAD system for chip design (schematics, layout, DRC, LVS, ERC, etc.).

Cadence Design System – Ubiquitous commercial CAD system with a generous university program.

The Windows LAyout System for Individuals (LASI) is located here.

Information on submitting chips to MOSIS can be found here.